Execution-Driven Simulation of Shared-Memory Multiprocessors

This paper describes an eecient execution-driven technique for the simulation of shared-memory multiprocessors driven by real programs. Our simulator ooers substantial advantages in terms of reduced time and space overheads when compared to instruction-driven or trace-driven simulation techniques, without signiicant loss of accuracy. The technique produces correctly interleaved address traces at run time without disk access overhead, allowing accurate simulation of a variety of architectural alternatives for programs. We present the results of several validation experiments used to quantify the accuracy and eeciency of the technique for three shared-memory multiprocessors and several parallel algorithms. These experiments show that prediction errors of less than 5% and overheads 5 to 25 times lower than those incurred by cycle-level simulation can be achieved.